The continuing revolution in computer hardware is packing over more logic gates in ever smaller volumes. Unfortunately this produces ever more heat which will limit the feasible packing density and performance unless the energy dissipated by each logic operation can also be dramatically reduced. To reduce the energy dissipation of a logic operation below ln(2)kT (near thermal noise) requires the use of reversible logic for fundamental thermodynamic reasons. Extrapolation of current trends suggests this limit will become significant within one to two decades. Many real devices can be viewed as electrically controlled switches, so a method of using switches to implement reversible computations are useful. Two methods of using switches to implement reversible computations are discussed in this paper. The first method has an energy dissipation which is proportional to the square of the error in the voltage, while the second method has an energy dissipation which can in principle be reduced indefinitely by slowing the speed of computation. The first method is basically an extension to 'pass logic' which has been previously used with both nMOS (hot clock nMOS) and CMOS transmission gates to achieve low energy dissipation. The second method is a novel thermodynamically reversible logic system based on CCD-like operations which switches charge packets in a reversible fashion to achieve low energy dissipation.